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IBM shows racetrack memory concept

IBM shows racetrack memory concept

IBM has unveiled a "racetrack memory" chip prototype at the IEEE conference International Electron Devices Meeting (IEDM) in Washington DC.

The scientists at IBM revealed that the racetrack memory combines the assets of DRAM memory and the low cost of hard disk drives.

They hope that these breakthroughs could provide a new technological basis for the convergence of computing, communication, and consumer electronics.

IBM said that the aim of its research was to solve the problem of marrying the growing data storage requirements with smaller devices.

Racetrack memory uses electric currents to move electrons up and down a nanowire about 240nm wide and about 20nm thick. The currents manipulate the magnetic state of nano-scale magnetic regions within the magnetic nanowires. Each nanowire represents a "cell" where electrons are stored.

The firm claims that the racetrack memory has far greater durability than today's NAND flash memory.

However, it faces a challenge from other next-generation memory technologies such as phase-change memory (PCM), triple-level cell (TLC) NAND, magnetoresistive random-access memory (MRAM) - even IBM's fading MEMS-based (and trés bizarre) Millipede effort.

Copyright Press Association 2011

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